Gutz Logic Capabilities

     ·        PCI Express RTL design and PCIe Testbench design

·        Custom Verilog Vera System Verilog Testbench design for your PCI Express product. FPGA PCI Express Core Tests and Simulations for VCS, Modelsim or Cadence environments.

·        Custom RTL for your PCI Express product. PCI Express RTL Core or RTL to connect to your PCI Express Core. Including Nand Flash designs.

·        Design experience with Antifuse, SRAM and FLASH based FPGAs as well as standard cell and custom ASIC designs using Verilog and VHDL.

·        Micro Architecture specification development

·        HDL Coding and Synthesis

·        Testbench Development and Verification

·        Timing and Performance Analysis

·        Hardware Validation Testing and Analysis

·        Design optimization for Performance

·        Intellectual Property Development, Porting and Integration

·        Gutz Logic performs most FPGA/ASIC development and verification with Synopsys VCS RTL verification/Simulation tool along with NOVAS Debussy debugger.

·        Xilinx ISE Foundation

·        Designed, verified and validated several PCI(X) and PCI Express FPGA and ASIC designs including the following:  

·        PLX Technology, Inc. 8114 PCI(X) to PCI Express 4-lane bridge chip

·        PLX Technology, Inc. 8111 PCI to PCI Express 1-lane bridge chip

·        Several IP cores for Actel including their first 66 MHz PCI endpoint core